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AQA GCSE Computer Science

Computer systems and CPU architecture — AQA GCSE Computer Science revision

Free revision notes, key terms, common exam traps and 5 practice questions with answers. About 7 minutes to read.

The von Neumann model

  • Von Neumann architecture stores both program instructions and data together in the same main memory (RAM).
  • The CPU is made up of the Control Unit (CU), Arithmetic Logic Unit (ALU) and registers, connected by buses to memory.
  • Buses carry information around the system: the address bus carries memory locations, the data bus carries the actual data or instructions, and the control bus carries control signals.
  • Because instructions and data share memory, the CPU must fetch them one at a time using addresses stored in special registers.

The fetch-decode-execute cycle

  • Fetch: the address in the Program Counter (PC) is copied to the Memory Address Register (MAR); the instruction at that address is copied into the Memory Data Register (MDR); the PC is then incremented.
  • Decode: the Control Unit decodes the instruction in the MDR to work out what operation must be carried out.
  • Execute: the instruction is carried out, which might involve the ALU performing a calculation or comparison, and the result may be stored in the Accumulator or written back to memory.
  • This cycle repeats continuously, millions or billions of times per second, for as long as the computer runs a program.
  • The Accumulator is a register used to store the results of calculations performed by the ALU during execution.

Key terms

Von Neumann architecture
A computer design where program instructions and data are stored together in the same memory.
CPU
Central Processing Unit; the part of a computer that fetches, decodes and executes instructions.
Control Unit (CU)
The part of the CPU that coordinates the fetch-decode-execute cycle.
Arithmetic Logic Unit (ALU)
The part of the CPU that performs arithmetic and logical operations.
Program Counter (PC)
A register that holds the address of the next instruction to be fetched.
Memory Address Register (MAR)
A register that holds the address currently being accessed in memory.

Common exam traps

  • Saying the CPU 'stores' data permanently — registers only hold data temporarily during processing.
  • Mixing up the MAR (holds an address) with the MDR (holds the actual data or instruction).
  • Thinking more cores always makes software run faster — software must be written to use multiple cores.

Practice questions with answers

  1. 1. What does CPU stand for?

    • • Central Processing Unit
    • • Computer Processing Unit
    • • Central Program Unit
    • • Control Processing Unit

    Answer: Central Processing Unit

    CPU stands for Central Processing Unit.

  2. 2. Which register holds the address of the next instruction to fetch?

    • • MDR
    • • MAR
    • • Program Counter
    • • Accumulator

    Answer: Program Counter

    The PC always holds the address of the next instruction to be fetched.

  3. 3. Which component performs arithmetic and logical operations?

    • • Control Unit
    • • ALU
    • • MAR
    • • Cache

    Answer: ALU

    The Arithmetic Logic Unit carries out calculations and comparisons.

  4. 4. Name the three stages of the fetch-decode-execute cycle.

    Answer: Fetch, decode, execute

    The CPU fetches an instruction, decodes what it means, then executes it.

  5. 5. What does the MDR hold?

    • • A memory address
    • • The data or instruction being transferred
    • • The clock speed
    • • The number of cores

    Answer: The data or instruction being transferred

    The Memory Data Register holds data or instructions moving to or from memory.

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